Advances in computer systems architecture

Advances in Computer Systems Architecture: 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004. Proceedings<br />Author: Pen-Chung Yew, Jingling Xue<br /> Published by Springer Berlin Heidelberg<br /> ISBN: 978-3-540-23003-8<br /> DOI: 10.1007/b100354<br /><br />Table of Contents:<p></p><ul><li>Some Real Observations on Virtual Machines </li><li>Replica Victim Caching to Improve Reliability of In-Cache Replication </li><li>Efficient Victim Mechanism on Sector Cache Organization </li><li>Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy </li><li>Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures </li><li>A Configurable System-on-Chip Architecture for Embedded Devices </li><li>An Auto-adaptative Reconfigurable Architecture for the Control </li><li>Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory </li><li>Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System </li><li>Architecture Design of a High-Performance 32-Bit Fixed-Point DSP </li><li>TengYue-1: A High Performance Embedded SoC </li><li>A Fault-Tolerant Single-Chip Multiprocessor </li><li>Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy </li><li>dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization </li><li>High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption </li><li>Dynamic Reallocation of Functional Units in Superscalar Processors </li><li>Multiple-Dimension Scalable Adaptive Stream Architecture </li><li>Impact of Register-Cache Bandwidth Variation on Processor Performance </li><li>Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling </li><li>Continuous Adaptive Object-Code Re-optimization Framework</li></ul>